MOS 6502 [1975]
This is the (bug-fixed, post June 1976 version of the) original implementation of the 6502 designed by MOS Technology, Inc. in 1975, and manufactured in the NMOS, HMOS or HMOS-2 technologies. All MOS/CSG 65xx/75xx/85xx CPUs, the Rockwell R6502, Synertek SY6502 and Pravetz CM630 CPUs as well as the Ricoh 2A03 and 2A07 chips in the NES are based on this implementation. 151 opcodes are documented, the remaining 105 have undocumented behavior.
Download Description Files
All data on this website is generated from structured .txt files that describe the CPUs.
cpu_6502.txt
| Name | Size | Description |
|---|---|---|
| A | 8 | Accumulator |
| X | 8 | X Index Register |
| Y | 8 | Y Index Register |
| S | 8 | Stack Pointer |
| P | 8 | Processor Status |
| PC | 16 | Program Counter |
| N | V | - | B | D | I | Z | C |
|---|
| 7 | N | Negative |
| 6 | V | Overflow |
| 5 | - | (Expansion) |
| 4 | B | Break Command |
| 3 | D | Decimal |
| 2 | I | Interrupt Disable |
| 1 | Z | Zero |
| 0 | C | Carry |
| $FFFA | NMI |
| $FFFC | RESET |
| $FFFE | IRQ |
| Load/Store |
| Transfer |
| Stack |
| Shift |
| Logic |
| Arithmetic |
| Arithmetic: Inc/Dec |
| Control Flow |
| Control Flow: Branch |
| Flags |
| KIL |
| NOP |